New Foveros

This week an Architecture Day event held in which Intel announced New Foveros 3D chips to stack it with different elements. The company’s biggest goal for 2019 is to built products made on 3D Foveros stacking which is an industry-first implementation of stacked processing components inside a chip.

“We can build breakthrough architectures that cannot be done easily with existing approaches,” said Wilfred Gomes, an Intel senior principal engineer. Foveros is a Greek word meaning “unique and special,” he added.

The company claims that 3D stacking delivers the benefits like performance boost and power savings, this modular approach also helps Intel building full chips at 10nm scale. Because of Foveros unique structure both high-performance, high-density and low-power silicon can be combined on a single device. It will also allow developers to mix-and-match IP blocks with different memory, sensor, and I/O elements, to made new devices and form factors.

Previously, Intel 10nm roadmaps were not up to the mark and also the company received engineering challenges on that project. In October, a report from Semiaccurate even said that Intel has canceled its 10nm plans altogether. Later, the company denied the rumors and said they were making progress on 10nm, apart from New Foveros Intel is also working on 2D stacking which is the separation of various processor components into smaller chipsets.

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Therefore, Intel could deliver nominally 10nm CPUs along with various 14nm and 22nm chipset modules within them. At that event, Intel also announced a new microarchitecture codename to memorize called “Sunny Cove.” In the mid of Next year, Sunny Cove will be Intel’s next-generation Core and Xeon processors. Whereas on the Graphics side the company got Gen11 integrated graphics which is designed to break the 1 TFLOPS barrier part of 2019 “10nm-based” processors.

Moreover, Intel is currently involved in the reorganization and redesigning of its chip design strategy and philosophy. This approach annually takes place between introducing an advanced manufacturing process and advanced architecture to process computing instructions.

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